Harmonic Synthesiser & Network Impact

Pick a load, watch harmonics build, and see the transformer heat, the neutral overload, the LV voltage distort, and capacitors resonate · 50 Hz · IS / IEC / IEEE

Transformer & system

enter your site — short‑circuit, distortion, neutral, heating and resonance are calculated live

Transformer kVA

Impedance %Z

PCC voltage (HV, kV)

HV fault level (MVA)

LV voltage (V, L‑L)

Present load (kW)

Max demand 12‑mo (kVA)

Non‑linear share (%)

60%

Load type (auto‑harmonics)

Capacitor / APFC (kVAR)

Capacitor mode

Fundamental — current & voltage (50 Hz)

I₁ + V₁

Harmonic content — current & voltage (Σ 2…50)

Total distorted — current & voltage

Harmonic spectrum (% of fundamental)

Speed1.0×

Harmonic sliders

AUTO · 6‑pulse VFDharmonics follow the load type and scale with non‑linear %.

Positive (h = 1, 4, 7…) Negative (2, 5, 8, 11…) Zero · triplen (3, 9, 15…)

OrdMagnitude%A rmsPhase°

1Fund.100—0° · reference

Point of Common Coupling (PCC) — IEEE 519‑2022 assessment

HV side · 95th‑percentile basis

I_sc @ PCC

—

short‑circuit

I_L (12‑mo demand)

—

max demand

I_sc / I_L

—

→ TDD limit

IEEE 519‑2022 current limits for this I_sc/I_L band (% of I_L)

Assessed on the 95th‑percentile short‑time basis (THD‑I & absolute harmonic current relative to I_L). Individual‑order and TDD limits scale with the short‑circuit stiffness I_sc/I_L — Table 2 (≤69 kV), halved per Table 3 above 69 kV. Voltage limit per Table 1.

LV bus — distortion & currents

at the transformer secondary

LV full‑load current I_FLC—

LV I_sc · total Z (source + Tx)—

Harmonic current drawn (LV)—

Distortion power D (non‑active VA)—

Hot‑spot temperature & estimated harmonic thermal stress

— °C hot‑spot

40°C—110°C ageing

—

Indicative hot‑spot from loading + harmonic eddy (∝ h²) + triplen neutral heating (IEEE C57.110 / C57.91 trend). K‑factor = Σ(Iₕ²h²)/ΣIₕ²; specify a transformer rated ≥ the computed K.

Neutral conductor Z_N (mΩ)

Local earth R_E (Ω)

Source earth R_Es (Ω)

Power factor @ LV bus

displacement & true PF — dual‑reading meter

True power factor (PF = DPF × distortion)

—

Displacement PF (DPF = cos φ₁)

—

Solid needle = true PF · dashed = displacement PF. True PF carries the harmonic penalty; a tuned (LC) bank lowers upstream THD‑I and lifts true PF, a plain bank at resonance does the opposite.

Estimated parallel resonance & system harmonic impedance

capacitor OFF

Estimated parallel resonance frequency

—

Resonant harmonic order

—

Switch the capacitor on to assess resonance.

kVA demand released (capacity freed)

—

Transformer copper‑loss saving

—

THD‑V amplification—

Capacitor current loading—

System harmonic impedance Z(h) — peak = parallel resonance

Blue = no capacitor (≈ h·X). Amber = with capacitor — the peak is where C resonates with the source/transformer L. Dots mark the harmonics your load injects. Danger when a dot sits under the peak.

Harmonic energy loss — three‑phase total

additional ACTIVE power (real, billable kWh) dissipated as heat — IEEE C57.110

—

estimated additional active loss — heat (kW, 3‑phase)

…added on top of load losses at this load—

K‑factor (F_HL) · F_HL‑STR—

Max continuous loading (C57.110 capability)—

Transformer X/R

Load loss P_k (kW) — optional

Where the loss goes

Per IEEE C57.110‑2018 harmonic loss factors: DC I²R (∝ harmonic rms²) + winding eddy P_EC·F_HL (∝ h²) + other stray P_OSL·F_HL‑STR (∝ h^0.8, tank/clamps) + the external neutral conductor I_N²·R_N (a cable loss, not a winding loss — the triplen currents in the phase windings are already counted separately, so this is not double‑counted). Uses the harmonic current that actually flows in the transformer (load injection × source/capacitor current divider), so a plain‑cap resonance raises the loss and a tuned reactor lowers it. These are active losses (real, dissipated as heat) — distinct from the non‑active distortion power D under power factor. Estimated values: rated load loss = measured P_k when entered, else %R·kVA with %R = %Z/√(1+(X/R)²); P_EC/P_OSL are typical split fractions and %R is referenced to 75 °C (IEC 60076‑1) — substitute manufacturer test data for an exact figure.

Method & standards. LV S/C Z_tot=%Z/100 + S_tx/S_fault · HV ratio I_sc/I_L=S_fault/S_demand (I_L = 12‑month max demand) · TDD assessed at the HV PCC (≤69 kV → IEEE 519 Table 2; 69–161 kV → Table 3) — not at 415 V · neutral I_N=3·√Σ I_3,9,15…² (zero‑sequence triplens) · heating via K‑factor K=Σ(h²I_h²)/Σ I_h², eddy loss ∝ h²I_h² · parallel resonance h_r=√(S_sc/Q_cap), f_r=50·h_r.
IEEE 519‑2022 (limits) · IEEE C57.110‑2018 (transformer derating) · IEC 61000‑4‑7 / 61000‑3‑6 / 61000‑2‑4, IEC 60076‑7 (loading), IEC 60364‑5‑52 (neutral sizing), IEC 60871 / IEEE 18 (capacitors) (IEC) · IS 2026 / IS 3043 (BIS).
Hot‑spot and resonance amplification are indicative teaching trends (damped), not certified ratings; eddy model is conservative above the 25th order per IEEE C57.110.

Foretec Electric India Pvt Ltd, Coimbatore — A teaching synthesiser for field‑ready power‑quality engineers — www.foretecelectric.com

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